In current systems that perform analog to digital conversion of high speed electrical signals, that is signals in the 1GHz range, the input signal is sampled and then held, using an analog storage device, to provide time for the conversion to be performed. Some prior art circuits use a track and hold circuit in place of the sample and hold circuit.
When a track and hold circuit is used, the bandwidth of the circuit following the track and hold circuit must be approximately twice the sample rate. In sample and hold circuits the bandwidth needed is approximately equal to the sample rate. Since the noise being filtered by the circuit is dependent upon the bandwidth, reducing the bandwidth will reduce the noise and provide for an easier design.
In either sample and hold or track and hold circuits, the analog holding component is usually a capacitor. The hold time is therefore dependent upon the impedance in parallel with the capacitor and the size of the capacitor. A large capacitor is difficult to construct on an integrated circuit, and a large capacitor is difficult to charge quickly enough to provide a high speed sampler. Therefore, the goal of a high speed sampler circuit is to minimize the value of the hold capacitor. The impedance in parallel with the capacitor is primarily determined by the input impedance of the circuit following the capacitor, which means that this circuit must have a high impedance in order to provide an adequate hold time for the signal. Because of the hold requirements, and the associated need for a high impedance connecting circuit, bi-polar technology cannot be used in the circuit following the hold component. This is a significant limitation in prior art circuits. A further discussion of this problem can be found in "A Complete Monolithic Sample/Hold Amplifier", Kenneth R. Stafford, et al., IEEE Journal of Solid State Circuits. Vol. SC-9, No. 6, December 1974, pp.381-387.
An example of a prior art converter can be found in "A 1-GHz 6-bit ADC System", Ken Poulton, John J. Corcoran, and Thomas Hornak, IEEE Journal of Solid-State Circuits, Vol. SC-22, No. 6, December 1987, pp. 962-970.
There is a need in the art then for a high speed analog to digital conversion system that performs the conversion without using a hold circuit. There is a another need for such a system that provides a better noise filtering by reducing the bandwidth requirements of the circuit that follows the sampler. Still another need is for such a system that does not require circuits following the sampling circuit to have a high impedance input. The present invention meets these needs.